Title:
集積回路とその製造方法
Document Type and Number:
Japanese Patent JP5830797
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide an integrated circuit which can operate at high speed for variations in the threshold of transistors which increases more and more in the future.SOLUTION: An integrated circuit 1 comprises a current-controlled MOS current logic circuit 10, a variable resistance element 20 to be connected with the MOSFET 16 for constant current of the current-controlled MOS current logic circuit 10, an amplifier 22 which detects the variation ▵Vof output reference voltage incident to the variation in threshold of the current-controlled MOS current logic circuit 10, and a writing circuit 34 which writes the resistance of the variable resistance element 20. Difference between the reference voltage Vof the current-controlled MOS current logic circuit 10 and the output signal is detected by the amplifier 22, and the resistance of the variable resistance element 20 is written by the writing circuit 34. Even if the thresholds of transistors configuring the circuitry are varied, the integrated circuit 1 operates stably at high speed.
Inventors:
Tetsuro Endo
Ueyanagi Masashi
Ueyanagi Masashi
Application Number:
JP2011102625A
Publication Date:
December 09, 2015
Filing Date:
April 30, 2011
Export Citation:
Assignee:
Tohoku University
International Classes:
H01L21/8246; H01L21/822; H01L27/04; H01L27/105; H01L29/82; H01L43/08
Domestic Patent References:
| JP2002176150A | ||||
| JP2002359356A | ||||
| JP2007258243A | ||||
| JP2000163970A | ||||
| JP2003085966A | ||||
| JP2009302254A | ||||
| JP2008123584A |
Other References:
T.ENDOH(他4名),The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-speed Operation,電子情報通信学会技術研究報告. ED, 電子デバイス,日本,一般社団法人電子情報通信学会,2010年 6月30日,Vol.110, No.109,p.257-262,刊行物に記載の発行日は6/23だが、公表は6/30に行われた
Attorney, Agent or Firm:
Kazuyuki Hirayama
Tetsuya Shinoda
Tetsuya Shinoda