Title:
集積電力増幅回路
Document Type and Number:
Japanese Patent JP2007505512
Kind Code:
A
Abstract:
Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided. In accordance with a third embodiment of the invention, a detector circuit in the form of an integrated logarithmic current detector circuit in conjunction with a three stage power amplifier integrated circuit. The three embodiments of the invention advantageously overcome the limitations of the prior art.
Inventors:
Mark Doherty
John Gillis
Michael mcpartlin
David Elms
Philip Antognetti
John Gillis
Michael mcpartlin
David Elms
Philip Antognetti
Application Number:
JP2006515596A
Publication Date:
March 08, 2007
Filing Date:
June 17, 2004
Export Citation:
Assignee:
SiGe Semiconductor(U.S.),Corp.
International Classes:
H03F1/30; H03F1/02; H03F3/189; H03F3/195; H03F3/213
Attorney, Agent or Firm:
Dobashi Akira