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Title:
INTEGRATING CIRCUIT
Document Type and Number:
Japanese Patent JPS58137321
Kind Code:
A
Abstract:

PURPOSE: To obtain a novel and simple integrating circuit which is used conveniently for Hadamard transformation, by sampling an input signal and integrating sampled values after or without inversion according to a control signal.

CONSTITUTION: When a terminal 44 is held at a true level, a transistor (TR) 39 turns on to discharge a capacitor 22. When the terminal 44 is held at an NOT level, the TR39 turns off. Then, the input signal applied to an input terminal 26 in every cycle of pulses applied to terminals 42 and 43 is sampled once and at every time, the capacitor 22 is charged to the proportional amount of charge with the same or opposite polarity with or to the sample value. When the terminal 42 is held at the true level and the terminal 43 is held at the NOT level, either of terminals 40 and 41 is at the true level and a capacitor 23 is charged with the input signal with the positive or negative polarity; when the terminal 42 is held at the NOT level and the terminal 43 is at the true level, the integral capacitor 22 is charged.


Inventors:
SUGIMOTO MASUNORI
Application Number:
JP1910682A
Publication Date:
August 15, 1983
Filing Date:
February 09, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Domestic Patent References:
JPS56126311A1981-10-03
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)