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Patent Searching and Data


Title:
INTEGRATION TYPE A/D CONVERTER
Document Type and Number:
Japanese Patent JPH03117031
Kind Code:
A
Abstract:

PURPOSE: To attain automatic zero compensation with high accuracy in a short time and to realize high accuracy and high speed for A/D conversion by providing the automatic zero-offset compensating circuits different in time constant.

CONSTITUTION: A resistor R2 and a switch S3, which are serially connected, are parallelly connected to a resistor R1 and for this switch S3, ON/OFF control is executed according to a control signal from a control circuit 4. In order to return the output of an integrator 1 to an initial state during the period of automatic zero compensation, an integral resistance value is switched and the period of the automatic zero compensation is shortened. Thus, A/D conversion can be executed with high accuracy and even when the period of the automatic zero compensation is shortened, the output voltage of the integrator 1 can be enlarged.


Inventors:
OKUZUMI AKIRA
Application Number:
JP25415889A
Publication Date:
May 17, 1991
Filing Date:
September 28, 1989
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
H03M1/52; (IPC1-7): H03M1/52
Attorney, Agent or Firm:
Uchihara Shin