Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
INTERFACE CIRCUIT AND RECONFIGURABLE INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JP2011187003
Kind Code:
A
Abstract:

To continuously supply data to a circuit to be inspected when speed of data transfer between a computer and an emulator is different from speed of the data transfer between an I/F part and the circuit to be inspected.

The interface circuit includes: a memory which holds the data received from the computer on which verification environment of hardware and software is mounted and outputs the held data to the circuit to be inspected attained on the emulator; and a data supply control circuit which determines whether the data are held in the memory, supplies a clock signal to the circuit to be inspected, and permits a memory reading request to the memory by the circuit to be inspected, when the data are held in the memory, and stops supply of the clock signal to the circuit to be inspected and does not permit the memory reading request to the memory by the circuit to be inspected, when the data are not held in the memory.


Inventors:
BABA TAKETO
Application Number:
JP2010054378A
Publication Date:
September 22, 2011
Filing Date:
March 11, 2010
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G06F13/42
Attorney, Agent or Firm:
Kato Asamichi



 
Previous Patent: JP2011187002

Next Patent: INTEGRATED MANAGEMENT SYSTEM