PURPOSE: To prevent a transistor under use from being degraded by an impressed voltage without using a transistor provided with high voltage resistance.
CONSTITUTION: An N channel MOS transistor TN 2 is used for lowering (clamping) a voltage which is higher than a power supply voltage VCC 1 and impressed from a pad P1. When inputting an H state to an input IN, a voltage boost clamp circuit U outputs a voltage at a voltage degree adding a threshold voltage Vt of this N channel MOS transistor TN 2 to the power supply voltage VCC 1 to an output OUT. On the other hand, when inputting an L state, the circuit U outputs a voltage lower than the power supply voltage VCC 1. The voltage to be impressed to the N channel MOS transistor TN 2 is made higher than the power supply voltage VCC 1 but lower than the voltage to be impressed to the pad P1, and the term of impression is short time as well.