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Patent Searching and Data


Title:
INTERFACE CIRCUIT
Document Type and Number:
Japanese Patent JPS5880916
Kind Code:
A
Abstract:

PURPOSE: To apply a process of manufacturing an integrated circuit with low dielectric strength to one interface circuit, and to realize reduction in chip area and economization, by applying current coupling to an information coupling means from one side to the other.

CONSTITUTION: The input SIGi of an interface circuit INT is connected to one input of a control circuit CONT, whose output is connected to the input CPUi of a coupling means CPU; and the output CPUo of the coupling means CPU is connected to the input CSi of a current generating means CS, whose one output CS01 is connected to the output SIGo of the interface circuit INF while the other output CS00 is connected to the other input of the control circuit CONT. The control circuit CONT executes a comparison between those two input signals, i.e. SIGi and CS00 and performs control to obtain coincidence between both of them, so both inputs are in proportion to each other in a balanced state and both outputs CS01 and CS00 of the current generating means CS have proportional relation, so that the inputs SIGi to the interface circuit INF and the output SIGo are in proportion to each other.


Inventors:
HAMASATO KAZUO
OONO MASAHIKO
SAKURAI YOSHITO
KOJIMA SADAO
TAKADA KENZOU
Application Number:
JP17868781A
Publication Date:
May 16, 1983
Filing Date:
November 07, 1981
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
NIPPON ELECTRIC CO
HITACHI LTD
OKI ELECTRIC IND CO LTD
FUJITSU LTD
International Classes:
H04B3/00; G06G7/12; H03H11/02; (IPC1-7): H03H11/02; H04B3/02
Attorney, Agent or Firm:
Kugoro Tamamushi