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Title:
INTERFACE CIRCUIT
Document Type and Number:
Japanese Patent JPS59104815
Kind Code:
A
Abstract:

PURPOSE: To attain the signal transmission to plural signal transmitting paths without decreasing the amplification degree of an amplifier output signal by prodiving a transistor(TR) operated to ON state or OFF state.

CONSTITUTION: The input impedance of a TRQ11 viewed from an output terminal Tout becomes a comparatively high value by providing the TRQ11 to an interface circuit 2. Thus, almost no current flows from a collector of a TRQ6 of an amplifier circuit 1 to the interface circuit 12. Then, it is not required especially to use TRs having a large power capacity for TRs Q6, Q8 constituting an output circuit, nor an output voltage Vout is attenuated. Thus, the signal transmission to plural signal transmitting paths is attained.


Inventors:
NAGAI YASUO
Application Number:
JP21388982A
Publication Date:
June 16, 1984
Filing Date:
December 08, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03H11/36; H03K19/018; (IPC1-7): H03H11/36
Attorney, Agent or Firm:
Tomio Dainichi



 
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