Title:
INTERFACE CIRCUIT
Document Type and Number:
Japanese Patent JPS6043767
Kind Code:
A
Abstract:
A serial to parallel bus converter (11) enables a slave computer (13), having a parallel bus input (19) to be controlled by a master computer (15) via a serial bus connection (14). The converter (11) interprets commands from the master computer (15) to provide appropriate control commands for the slave computer (13). Instructions received from the master computer (15) are provided to the slave computer (13) when complete commands from the master computer (15) are received by the converter (11). The converter (11) uses an intermediate bus (29), which is connected to the RAMs (27), ports (41-44) and a control register (45) for communicating with the slave computer (13), a UART port (31) for communicating with the master computer (15), a microprocessor (25) and a programmable read only memory (PROM) (33) for the microprocessor (25). Advantages include a capability of directly programming the slave computer (13) from the master computer (15), and the ability to verify transmission between the master computer (15) and the slave computer (13). The system has an ability to use serial transmissions between the computers (13,15), even though the slave computer (13) may not have serial data transmission capabilities, by using the converter (11) as a buffer.
Inventors:
AAMETSUDO II SERIMU
TOOMASU OSUKAA WAIRUBATSUKAA
TOOMASU OSUKAA WAIRUBATSUKAA
Application Number:
JP14457784A
Publication Date:
March 08, 1985
Filing Date:
July 13, 1984
Export Citation:
Assignee:
BENDIX CORP
International Classes:
G06F13/38; G06F15/16; G06F15/17; (IPC1-7): G06F13/38; G06F15/16
Attorney, Agent or Firm:
Masaki Yamakawa