Title:
INTERFACE NOISE ELIMINATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5274268
Kind Code:
A
Abstract:
PURPOSE: To provide a simple method to eliminate noise and make operation of circuits positive obtaining the noise output by detecting the rise and fall of the input pulse and applying the output of timer circuit and D type FF. to exclusive or circuit.
Inventors:
OOTSUKA MITSUNOBU
Application Number:
JP14960575A
Publication Date:
June 22, 1977
Filing Date:
December 17, 1975
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H03K5/1252; H03G3/34; (IPC1-7): H04B1/10
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