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Title:
INTERNAL INTERRUPT PROCESSING SYSTEM AT INTELLIGENT TERMINAL
Document Type and Number:
Japanese Patent JPS531430
Kind Code:
A
Abstract:

PURPOSE: To reduce the hardware by eliminating the interrupt process hard logic, thru the read-in of various interrupts to the registers with the test interrupt instruction and the transfer to the required routine after sequentially making bit check.


Inventors:
KOMORI SATOSHI
TAKAHARA YOSHIO
Application Number:
JP7529676A
Publication Date:
January 09, 1978
Filing Date:
June 25, 1976
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
TOSHIBA ENGINEERING CO
International Classes:
G06F13/24; G06F3/00; G06F9/48; (IPC1-7): G06F3/00; G06F9/18



 
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