To solve a problem that the generation of a test clock signal is made difficult when an internal operation clock is accelerated through it is necessary to input a clock signal of the same frequency as a test clock from the external in order to generate the test clock in an internal operation clock generation circuit.

The internal operation clock generation circuit provided with a test function is provided with a phase comparator circuit 1, a VCO circuit 2, a normal clock generation circuit 3, and a selector circuit 4. The circuit is also provided with a test VCO circuit 5 for oscillating a clock signal of frequency corresponding to voltage supplied from the comparator circuit 1, a test clock generation circuit 6, and a control signal generation circuit 7 for outputting a control signal for stopping the VCO circuit 5.