Title:
内部電圧発生回路
Document Type and Number:
Japanese Patent JP5142861
Kind Code:
B2
Abstract:
An output terminal of a first boost circuit is connected to a second boost circuit. After the second boost circuit is started up, a boost clock frequency of the second boost circuit is reduced. A time required to start up the second boost circuit is reduced, and in addition, a current supply capability of the first boost circuit is increased after the second boost circuit is started up. When the second boost circuit is driven, output voltages of the first and second boost circuits are stably supplied without instantaneously changing the output voltage of the first boost circuit.
Inventors:
Seiji Yamahira
Application Number:
JP2008179566A
Publication Date:
February 13, 2013
Filing Date:
July 09, 2008
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
H02M3/155; G06F1/26; H02M3/07
Domestic Patent References:
| JP2008011649A | ||||
| JP2007199210A | ||||
| JP57110076A |
Attorney, Agent or Firm:
Maeda patent office
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Atsushi Fujita
Kazunari Ninomiya
Tomoo Harada
Iseki Katsumori
Seki Kei
Yasuya Sugiura