PURPOSE: To provide an interval counter by a code delay method with a small circuit scale.
CONSTITUTION: Respective counters perform the counting operations of the corresponding ones of (n) pieces of counter clocks within the period of a counter gate. Only a full-bit counter 11 counts one hundred percent and two-bit counters 22-2n perform the counting operation of two bits for which overflow is neglected. After the lapse of a counter gate period, the size relation of the lower two bits of the count value of the full-bit counter 11 and the count values of (n-1) pieces of two-bit counters is detected in comparators 32-3n and the total sum is obtained in an adder 5. The adder 6 corrects a value for which the count value of the full-bit counter 11 is multipled by (n) in an (n)-multiplier 4 by the added value of the adder 5.
JPS57169681A | 1982-10-19 | |||
JPH04244971A | 1992-09-01 |