To provide an inverting amplifier capable of performing stable amplification action with low voltage.

A bias power supply 5 as a gate bias generating means is connected between the source Sp and the gate Gp of a P channel MOS transistor 1 of a CMOS type circuit through a bias resistor Rb, and the bias power supply 5 at this time is a direct current voltage source of (VTP+αp(≥βp))≤power supply voltage VDD. In such a case, VTP is threshold voltage of the P channel MOS transistor 1, αp is operating voltage of the P channel MOS transistor 1, and βp is drain voltage needed to saturate drain current Idp when bias voltage (VTP+αp) is applied between the gate Gp and the source Sp of the P channel MOS transistor 1.