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Patent Searching and Data


Title:
ISDN PACKET LOGIC MULTIPLEX COMMUNICATION SYSTEM
Document Type and Number:
Japanese Patent JPH0353734
Kind Code:
A
Abstract:

PURPOSE: To improve the processing speed of packet communication by allowing a packet logic multiplexer to set information speed based on an idle line capacity so as to inform it to a packet terminal and allowing the packet terminal to designate the informed information speed to apply calling request.

CONSTITUTION: When a packet terminal PT1 (X25CR) makes a calling request by a packet (in compliance with the CCITT recommendations X.25), a packet logic multiplexer (IPMX) 3 analyzes an I(X25CR) packet to check the incoming call information speed and checks whether the information speed is within the idle line capacity in a RAm 12, and retrieves the maximum information speed within the idle line capacity among the information speed usable for the packet terminal PT1 registered in advance in the RAM 12, sets the result to the calling information speed in the I(CRR) packet for the transmission. The packet terminal PT1 analyzes the I(CRR) packet, extracts its calling information speed and sets the information speed to the incoming call information speed in the I(X25CR) packet and sends the result.


Inventors:
FUJIOKA SUSUMU
Application Number:
JP19002289A
Publication Date:
March 07, 1991
Filing Date:
July 21, 1989
Export Citation:
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Assignee:
RICOH KK
International Classes:
H04L12/02; H04L47/76; (IPC1-7): H04L12/02; H04L12/56
Attorney, Agent or Firm:
Gunichiro Ariga