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Patent Searching and Data


Title:
JITTER ANALYSER
Document Type and Number:
Japanese Patent JPH04115169
Kind Code:
A
Abstract:

PURPOSE: To eliminate a measuring error and to carry out accurate measurement by adding reference calibration input for calibration at a constant cycle and comparing the measuring output thereof with a reference value and correcting the set clocking period of a start timer by the offset thereof.

CONSTITUTION: An unstable multivibrator 10 changes over jitter input and a reference calibration signal 11 and a reference voltage generator 12 generates the reference voltage corresponding to the reference set clocking period of a measuring start timer 3. The signal 11 is replaced with an input signal at a predetermined cycle to be inputted and the difference between the integration output accompanied by the signal and the voltage corresponding to the reference set clocking period is detected. The voltage of this difference corresponds to the difference between the reference set clocking period of the timer 3 and the set clocking period actually set to the timer 3 and the set clocking period of the timer 3 is controlled to the reference set clocking period. Therefore, even when the set clocking period of the timer 3 is shifted from the reference set clocking period, by correcting said set clocking period to the reference set clocking time, accurate measurement can be performed.


Inventors:
IKEGAMI SHINICHI
Application Number:
JP23434090A
Publication Date:
April 16, 1992
Filing Date:
September 06, 1990
Export Citation:
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Assignee:
KENWOOD CORP
International Classes:
G01R29/02; G01R35/00; (IPC1-7): G01R29/02
Attorney, Agent or Firm:
Nobuo Sunako