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Title:
JITTER DETECTOR AND PHASE-SYNCHRONIZING LOOP CIRCUIT THEREOF
Document Type and Number:
Japanese Patent JP2002107394
Kind Code:
A
Abstract:

To provide a device which is capable of exactly detecting jitters for detecting jitter quantities from signals at two sampling points around an edge which are subjected to analog/digital conversion, and to provide a phase synchronizing loop which uses the same.

The jitter detection circuit for detecting the jitter value of signal subjected to digital conversion from input analog signal contains an edge detector 200 for judging the change in the sign of both signals in two continuous sampling points from the digital-converted input signals and outputting both the signals at the change of sign as a first and a second edge signals, a comparator 210 for outputting the signal with smaller absolute value among the first and the second edge signals output from the edge detector 200, an calculating section 220 for dividing the output absolute value signal by the sum of each absolute value of the first and second edge signals and an accumulator 230 for accumulating the output of the operator 220 over a specific period and outputting it as the jitter value for the period.


Inventors:
SHIM JAE-SEONG
BOKU KENSHU
Application Number:
JP2001189986A
Publication Date:
April 10, 2002
Filing Date:
June 22, 2001
Export Citation:
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Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
G01R29/02; G01R25/00; G11B20/10; G11B20/14; H03L7/06; H03L7/08; H04L7/033; H04L25/02; (IPC1-7): G01R29/02; G11B20/10; G11B20/14; H03L7/06; H03L7/08; H04L25/02
Attorney, Agent or Firm:
Masatake Shiga (1 person outside)