PURPOSE: To make a data processor, on which an MPU is mounted, both fast and reliable.

CONSTITUTION: The data processor, equipped with a main storage device 5, the MPU 4, an I/O device 6, an address bus 1, a data bus 2, and a control bus 3, uses both a parity circuit 8 which detects the adequacy of an instruction and data when they are read out of the main storage device 5 and an error memory automatic repairing circuit 9 which corrects an error of the instruction and data altered while stored in the main storage 5 in a cycle wherein the main storage 5 is neither read nor written by the MPU 4, etc., in combination.