Title:
LAMINATED CERAMIC CAPACITOR AND METHOD OF MANUFACTURING IT
Document Type and Number:
Japanese Patent JP3734662
Kind Code:
B
Abstract:
PROBLEM TO BE SOLVED: To prevent short circuits by preventing the ceramic layers of a laminated ceramic chip from being left in low-insulation states due to the insufficient re-oxidization of the ceramic layers at the time of reoxidizing the laminated ceramic chip.
SOLUTION: In a laminated ceramic capacitor provided with a pair of external electrodes at the end sections of an elemental body formed by alternately laminating a plurality of internal electrodes which are arranged in series at prescribed intervals and a plurality of ceramic dielectric layers upon another and electrically connecting one sides of adjacent internal electrodes to one external electrode and the other sides of the electrode to the other external electrode, a metallic element (called 'acceptor') which improves the re- oxidizability of the ceramic dielectric layers is added to the dielectric layers in such a way that the concentration of the element in the dielectric layers in the central part of the elemental body in the thickness direction becomes higher than that of the element in the dielectric layers in the other part.
Inventors:
Kishi, Hiroshi
Chazono, Koichi
Shizuno, Hisamitsu
Chazono, Koichi
Shizuno, Hisamitsu
Application Number:
JP2000000037539
Publication Date:
October 28, 2005
Filing Date:
February 16, 2000
Export Citation:
Assignee:
TAIYO YUDEN CO LTD
International Classes:
H01G4/12; H01G2/20; H01G4/20; H01G4/228; H01G4/30; H01G2/00; H01G4/018; H01G4/12; H01G4/228; H01G4/30; (IPC1-7): H01G4/12
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