Title:
LAMINATED CHIP COMPONENT AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP2003289006
Kind Code:
A
Abstract:
To provide a laminated chip component in which the reliability of the junction of external electrodes is improved, and to provide a method for manufacturing the same.
Each of substrates of a-h layers is laminated in order. Internal Ags 1a, 2a, 3b and 4b, etc., formed on each substrate are exposed from the end of a chip component. External electrodes 31a and 31b are so formed as to cover each of the whole of both ends of the chip component including these exposed parts. As a result, both junctions between a chip element and an external electrode Ag and between the external electrode Ag and the internal Ag form a tight junction.
Inventors:
MIZUTSUKI HIROSHI
ARIGA YOSHIAKI
YAMABE TAKAYUKI
ARIGA YOSHIAKI
YAMABE TAKAYUKI
Application Number:
JP2002091418A
Publication Date:
October 10, 2003
Filing Date:
March 28, 2002
Export Citation:
Assignee:
KOA CORP
International Classes:
H01F41/04; H01F17/00; H01G4/228; H01G4/30; (IPC1-7): H01F17/00; H01F41/04; H01G4/228; H01G4/30
Attorney, Agent or Firm:
Yukio Maruyama
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