Title:
LAMINATED SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREFOR, AND MOTHER BOARD AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
Japanese Patent JP3847602
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a laminated semiconductor device and a manufacturing method therefor which improves reliability and heat radiation by controlling the gap between laminated boards in a simple method when heat or mechanical stress is applied.
SOLUTION: The laminated semiconductor device has a plurality of semiconductor devices 1 laminated with solder balls 10 mounted on back surface lands 8a. Each semiconductor device 1 and so on has a semiconductor chip 3 mounted and sealed with resin on a wiring board 2 having back surface lands 8a and front lands 8b and dummy bumps 12 and so on which are located lower than the solder balls 10 at opposite positions of opposed resin seal zones 4 on the semiconductor chip mounting backside of the wiring board 2.
Inventors:
Takuya Sugiyama
Hiroyuki Toso
Hiroyuki Toso
Application Number:
JP2001332584A
Publication Date:
November 22, 2006
Filing Date:
October 30, 2001
Export Citation:
Assignee:
Sharp Corporation
International Classes:
H01L25/18; H05K3/34; H01L23/12; H01L25/10; H01L25/11; H05K1/18; (IPC1-7): H01L25/10; H01L23/12; H01L25/11; H01L25/18; H05K1/18; H05K3/34
Domestic Patent References:
| JP10294423A | ||||
| JP2001110979A | ||||
| JP2000323616A | ||||
| JP11045956A | ||||
| JP8046313A |
Attorney, Agent or Firm:
Kenzo Hara International Patent Office
Kenzo Hara
Kenzo Hara