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Patent Searching and Data


Title:
LAMINATED SEMICONDUCTOR DEVICE MODULE WITH REDUCED NOISE
Document Type and Number:
Japanese Patent JPH11260999
Kind Code:
A
Abstract:

To obtain a BGA-type laminated semiconductor device module in which the packaging density of a motherboard can be increased and in which a noise reduction effect can be enhanced.

(a) One or two or more circuit boards 1 in which semiconductor elements A are mounted on their surfaces or their insides and which are provided with spherical metal connection members 4 on their fear surfaces and (b) at least one circuit board 2 in which a plurality of passive components B are mounted on its surface and which is provided with spherical metal connection members 4 on its rear surface are laminated in such a way that the boards are connected by the spherical metal connection members 4. Thereby, a laminated semiconductor device module is constituted. By this method, the circuit board 2 which is used exclusively for the passive components B is prepared, the passive components B are mounted on the board 2 at the same time, the circuit board 2 is laminated on the other circuit board 1 on which the semiconductor elements A are mounted, and the laminated semiconductor device module is formed. Thereby, its purpose can be achieved. Since the semiconductor elements A are not mounted on the circuit board 2 for the passive components B, the face of the circuit board 2 can be allocated to a mounting space for the passive components B, and many passive components B can be mounted.


Inventors:
YAMAMOTO TOSHISHIGE
Application Number:
JP6311198A
Publication Date:
September 24, 1999
Filing Date:
March 13, 1998
Export Citation:
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Assignee:
SUMITOMO METAL IND
International Classes:
H01L23/12; H01L25/10; H01L25/11; H01L25/18; H05K1/14; H05K3/34; (IPC1-7): H01L25/10; H01L23/12; H01L25/11; H01L25/18
Attorney, Agent or Firm:
Hirose Shoichi