LASER PROCESSING METHOD AND SEMICONDUCTOR CHIP

Title:

LASER PROCESSING METHOD AND SEMICONDUCTOR CHIP

Document Type and Number:

Japanese Patent JP2006140355

Kind Code:

A

Abstract:

To provide a laser beam processing method that enables precisely cutting a substrate on which a laminate is formed that includes a plurality of functional elements.

A modified region 7 is formed inside the substrate 4 along a planned cutting line by irradiating the back 4b of the substrate 4 as a laser beam incident surface with a laser beam L while a protective tape 22 is stuck to the surface 16a of the laminate 16, and a crack 24 is initiated that starts at the surface-side end 7a of the modified region 7 and terminates at the surface 4a of the substrate 4. Then, an expanded tape is stuck to the back 4b of the substrate 4, and is expanded while the crack 24 appears. This enables precisely cutting not only the substrate 4 but also the laminate 16 on the planned cutting line, or interlayer dielectrics 17a, 17b, along the planned cutting line.

Inventors:

SUGIURA RYUJI
SAKAMOTO TSUYOSHI

Application Number:

JP2004329560A

Publication Date:

June 01, 2006

Filing Date:

November 12, 2004

Export Citation:

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Assignee:

HAMAMATSU PHOTONICS KK

International Classes:

H01L21/301; B23K26/364; B23K26/38; B23K26/40; B23K101/42

Domestic Patent References:

JP2006140354A	2006-06-01
JP2003334812A	2003-11-25
JP2004001076A	2004-01-08
JP2003338467A	2003-11-28
JP2003154517A	2003-05-27
JP2005019667A	2005-01-20
JP2004179302A	2004-06-24
JPS53114347A	1978-10-05
JP2001015786A	2001-01-19

Foreign References:

WO2003076120A1

2003-09-18

Attorney, Agent or Firm:

Yoshiki Hasegawa
Shiro Terasaki
Satoru Ishida

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