Title:
LDD TRANSISTOR AND METHOD OF MANUFACTURE
Document Type and Number:
Japanese Patent JP2547690
Kind Code:
B2
Abstract:
PURPOSE: To provide an LDD transistor that is able to decrease hot carriers which are trapped by a strong electric field, and method of manufacture.
CONSTITUTION: After forming a gate 12 with a general method on a P-type substrate 10, ions of a type different from that of the substrate is implanted and diffused, and low density source/drain region 14 is formed. BSG as the material being doped with an impurity of the same type as that of the substrate is vapor-deposited on the entire surface of the substrate, gate sidewall spacers 13 are formed by etching it, an impurity diffused region that is of the same type as that of the substrate is formed directly under the gate sidewall 13 in the low density source/drain region 14 applying a post-annealing step, the ions of types different from that of the substrate is implanted and then diffused, and high density source and drain regions 16 are formed.
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Inventors:
RII IYON HAN
Application Number:
JP11676892A
Publication Date:
October 23, 1996
Filing Date:
April 10, 1992
Export Citation:
Assignee:
GOLD STAR ELECTRONICS
International Classes:
H01L21/225; H01L21/336; H01L29/78; (IPC1-7): H01L29/78; H01L21/336
Domestic Patent References:
| JPH01309376A | ||||
| JPS61214575A | ||||
| JPS6143477A |
Attorney, Agent or Firm:
Masaki Yamakawa