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Patent Searching and Data


Title:
LEAD FRAME AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS5895852
Kind Code:
A
Abstract:

PURPOSE: To improve the reliability of a semiconductor device using a resin seal package by effectively preventing the intrusion of water into the package due to a clearance between resin and an inner lead.

CONSTITUTION: The inner lead 2 is pressed by means of a die to which minute unevenness is formed. Predetermined indentations 21 are generated in the surface of the inner lead 2 while projection sections 23 called burr are generated in end sections in form at that time (b). When the inner lead 2 is pressed by means of a flat die, said projection sections 23 are pushed into the indentations 21, and the inner lead, which has wide structure in the inside or the bottom and to which minute unevenness is shaped, can be formed (c). When the inner lead 2 is sealed with resin, close adhesion between the inner lead 2 and resin 1 is improved and clearances are difficult to be formed because a surface area contacting with the resin 1 is wide, and the intrusion of water into the package can be inhibited effectively.


Inventors:
YOSHIZAWA HIROSHI
Application Number:
JP19402681A
Publication Date:
June 07, 1983
Filing Date:
December 02, 1981
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L23/50; H01L23/495; (IPC1-7): H01L23/48
Attorney, Agent or Firm:
Toshio Nakao