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Title:
LEAD FRAME FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURED WITH IT
Document Type and Number:
Japanese Patent JP2000114447
Kind Code:
A
Abstract:

To enable performing a satisfactory wire bonding during manufacturing operations of semiconductor devices without the misalignment of inner leads even when a lead frame for manufacturing a semiconductor device is heated, and to avoid disconnection between the inner leads and wires during resin packaging operations.

A die pad 2 on which a semiconductor chip is to be mounted is supported through support leads 23. A lead frame 2A for manufacturing a semiconductor device is provided with several inner leads 50 with their ends extending toward the die pad 2. Spaces between the adjacent inner leads 50 are filled with insulating material 2C throughout the length of the inner leads 50. Preferably, the gaps formed between the die pad 2, the support leads 23 and the inner leads 50 are filled with the insulating material 2C.


Inventors:
SHIBATA KAZUTAKA
Application Number:
JP28263998A
Publication Date:
April 21, 2000
Filing Date:
October 05, 1998
Export Citation:
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Assignee:
ROHM CO LTD
International Classes:
H01L23/50; (IPC1-7): H01L23/50
Attorney, Agent or Firm:
Minoru Yoshida (2 outside)