To provide a lead frame which has no plating burrs caused by a plated layer along an circumferential edge serving as an outline of a lead frame material and around a pilot hole and can make a highly reliable semiconductor device, and the semiconductor device.

After a through-hole 12 including the circumferential edge 14 of an outer periphery 13 of the lead frame material 11 on which a semiconductor element 24 is mounted and the pilot hole is formed, plating is applied. Thus, a metal-plated layer same as a surface plated layer 17 or a rear plated layer 18 is formed along the circumferential edge 14 of the lead frame material 11 or inside the through-hole 12. Since the through-hole 12 and the circumferential edge 14 to serve as the outline of the lead frame are thus coated with a plated layer not corroded by an etchant to form a metal plated layer 30, influence of side etching is not applied during a subsequent etching step, thereby preventing the plating burrs from occurring in the through-hole 12 and the circumferential edge 14.