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Patent Searching and Data


Title:
LEVEL ALARM DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPS5564455
Kind Code:
A
Abstract:

PURPOSE: To simplify adjustments of a level alram detection circuit provided with hysteresis characteristics by making it possible to set a detection level and hysteresis width independently.

CONSTITUTION: This circuit gives an alarm when a pilot level becomes smaller than an alarm level and reset the alarm for the 1st time when the pilot level increases above a reset level. Further, reference voltages E1 and E2 (E1<E2) are applied to alarm-level comparator IC1 and hysteresis-width setting comparator IC2. When the resistance value of variable resistor RV1 is varied to obtain input voltage kV0∼IC1 with input (constant value) V0 of a standard pilot level (0<k≤1), alarm level LA and reset level LB are shown by formulas (1) and (2) and the hysteresis width by formula (3) under no influence of (k). Then, LA and the hysteresis width can independently by varied by (k) and E2 respectively. Further, IC3 is D-type FF and its output of "1" causes an alarm state.


Inventors:
MIYAMOTO HIDETO
YOKOGAWA TAKASHI
Application Number:
JP13748478A
Publication Date:
May 15, 1980
Filing Date:
November 08, 1978
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G01R19/165; H04B3/10; H04B17/00; (IPC1-7): G01R19/00; H04B17/00