To provide a level control circuit capable of miniaturizing a decimation filter and the signal processing part of the poststage and reducing power consumption.

This level control circuit changes the response time of a decimation filter 103 for attenuating unwanted wave components included in a digital code for which signals frequency converted into a quadrature demodulation part 100 and band-limited to a desired band in an LPF part 101 are analog-to- digital converted in a Δ modulation (or ΔΣ modulation) part 102, based on the output information of a level detection/discrimation circuit 105 for detecting and discriminating, the reception level. For instance, the stage number of the decimation filter 103 is changed corresponding to the reception level. Thus, the decimation filter 103 and the signal processing part 106 are miniaturized, and the power consumption is reduced.