PURPOSE: To convert the level of an input logical signal at a high speed and to secure a large operation margin by providing with a both phase logical signal generating circuit, a 1st and a 2nd logical amplitude limiting circuit, and a 1st and a 2nd level shifting circuit, and a current switching circuit.

CONSTITUTION: When an input logical signal SO with a low logical level is supplied to a logical signal input line T1, a 1st logical signal S1 with a high logical level and 2nd logical signals S2 and S2' which both have the low logical level are obtained from the both-phase logical signal generating circuit 1. Then 3rd and 4th logical signals S3 and S4 are obtained from the 1st and 2nd logical signal limiting circuits 2A and 2B and 5th and 6th logical signals S5 and S6 which have the high logical level and low logical level are obtained from the 1st and 2nd level shifting circuits 4A and 4B. An output logical signal S7 which has a level higher than the low logical level of the low-logical signal S6 of the 6th logical signal S6 and an output logical signal S7' which has a level higher than the high logical level of the 5th logical signal S5 are obtained from the current switching circuit 5.