Title:
LEVEL SHIFTER
Document Type and Number:
Japanese Patent JP3764135
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a level shifter capable of operating highly accurately at a high operation frequency and preventing a change in duty ratio even when an amplitude difference between an input signal and an output signal is large.
SOLUTION: The level shifter comprises a first level shifter 1 having transistors MP1, MP2 whose sources are applied with power source voltages Vdd and drains are connected with gates of other transistors, and transistors MN1, MN2 whose gates are applied with signals Vin and VinB, and drains are connected with the drains of the transistors MP1, MP2, and sources are grounded; and a second level shifter 2 having transistors MN3, MN4 whose sources are grounded and drains are connected with gates of other transistors, and transistors MP3, MP4MP6 whose sources are applied with the power source voltages Vdd, gates are applied with the signals Vin, VinB, and drains are connected with the drains of the transistors MN3, MN4. The drain of the transistor MP1 and that of the transistor MN3 are connected, while the drain of the transistor MP2 and that of the transistor MN4 are connected.
Inventors:
Junichi Aoki
Application Number:
JP2002318488A
Publication Date:
April 05, 2006
Filing Date:
October 31, 2002
Export Citation:
Assignee:
NEC Electronics Corporation
International Classes:
H03K5/02; H03K3/012; H03K19/0185; H03K3/356; H03K3/017; (IPC1-7): H03K19/0185; H03K5/02
Domestic Patent References:
| JP11150471A | ||||
| JP8070247A | ||||
| JP2004040262A | ||||
| JP2000244306A | ||||
| JP9116418A | ||||
| JP2002344301A |
Attorney, Agent or Firm:
Tatsuo Tokumaru
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