Title:
LIFE ASSESSMENT METHOD FOR SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JP2015002242
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To estimate hot carrier life in consideration of influences caused by process variation in gate length, and to improve assessment accuracy.SOLUTION: A life assessment method for a semiconductor element includes: a step S2 of dividing a plurality of assessment target MOS transistors into a plurality of groups; a step S3 of performing an acceleration test by using a plurality of biases that are higher than an operation voltage and different from each group, to the MOS transistors; a step S4 of estimating each hot carrier life at the plurality of biases for each of the plurality of groups; steps S5 and S6 of measuring gate lengths of the MOS transistors and estimating each gate length; a step S7 of further dividing the MOS transistors depending on variation in gate length, in response to the assessment result of the gate lengths; and a step S8 of estimating the hot carrier life at the operation voltage of the MOS transistors by using data of hot carrier life in the acceleration test.
Inventors:
KAKUMOTO YUICHI
MURAKAMI KAZUYA
SATO SUSUMU
MURAKAMI KAZUYA
SATO SUSUMU
Application Number:
JP2013125646A
Publication Date:
January 05, 2015
Filing Date:
June 14, 2013
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
H01L21/66; G01R31/26; H01L21/336; H01L29/78
Attorney, Agent or Firm:
Masatoshi Kurata
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Peak Takashi
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Peak Takashi
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi
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