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Patent Searching and Data


Title:
LINE BUNDLE BIT WIDTH DETERMINING METHOD
Document Type and Number:
Japanese Patent JPH07114578
Kind Code:
A
Abstract:

PURPOSE: To provide the line bundle bit width determining method where bit widths of other undetermined line bundles are determined by determining bit widths of partial required line bundles.

CONSTITUTION: A line bundle bit width storage part 17 is retrieved in a bit width determination phase 13, and a line bundle is selected which has the bit width, already determined and is not selected in the bit width determination phase 13. Parts connected to the line bundle are obtained from a circuit connection information storage part 15. Next, bit width determination rules of pins of parts are obtained from a rule storage part 16 to determine the bit width of the undetermined line bundle connected to parts. The bit width determination phase 13 is repeated to determine the bit width of the undetermined line bundle. When any line bundles which are not selected are not found, the bit width selection phase 14 is started, and bit widths of line bundles are determined by a bit width selection rule, and the control is returned to the bit width determination phase 13. This operation is repeated to determine the bit widths of undetermined line bundles.


Inventors:
FUJIMOTO SHOICHI
IGAWA SATOSHI
MIYASAKA SHUJI
NAKASHIBA TAKAFUMI
Application Number:
JP25816593A
Publication Date:
May 02, 1995
Filing Date:
October 15, 1993
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F17/50; (IPC1-7): G06F17/50
Attorney, Agent or Firm:
Akira Kobiji (2 outside)