PURPOSE: To eliminate shock noises due to deterioration in line quality without a delay.

CONSTITUTION: A transmission rate clock extract circuit 2 generates a transmission rate clock phase in phase synchronously with a basic unit clock of a received digital signal. A phase difference measurement circuit 3 counts a measurement clock of a constant period in an interval from a change point of the received digital signal till a change point of the transmission rate clock. A comparator circuit 4 discriminates whether or not the count is a prescribed range and outputs a count enable signal to a counter 5 when not in the prescribed range and the counter 5 counts the transmission rate clock. The count value of the counter 5 is reset by a frame pulse at every frame of the reception data and latched by a latch circuit 6 just before the reset. The latched data are read by a microcomputer.