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Title:
非線形な特性のCMOSコンデンサを使用する線形増幅器
Document Type and Number:
Japanese Patent JP4272053
Kind Code:
B2
Abstract:
The invention provides an amplifier circuit made by digital CMOS processes, the amplifier circuit comprising a main operational amplifier with at least one input and at least one output and a feedback loop including a non-linear gateoxide capacitor, wherein a voltage control means is connected to the main operational amplifier to provide a voltage difference between the output common mode voltage and the input common mode voltage of the main operational amplifier to apply a DC biasing voltage across the non-linear gateoxide capacitor sufficient to operate the non-linear gateoxide capacitor in a bias range where the capacity of the none-linear gateoxide capacitor is almost independent of the applied voltage comprising the bias voltage plus a signal voltage.

Inventors:
Level martin
Application Number:
JP2003507943A
Publication Date:
June 03, 2009
Filing Date:
June 18, 2002
Export Citation:
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Assignee:
NXP B.V.
International Classes:
H03H11/04; H03F1/08; H03F3/45; H03F3/68
Domestic Patent References:
JP2000124770A
JP5335838A
JP2000077976A
Foreign References:
US4912427
DE2931525A
Other References:
トランジスタ技術SPECIAL,1999年 6月 1日,No.36,p.54-p.56
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Takeshi Sekine
Takahashi
Kenji Sugimura
Tatsuya Sawada