PURPOSE: To display a sharp picture even when clock timing is different by synchronizing a clock signal for an input signal with a clock signal for a liquid crystal display device.

CONSTITUTION: A transfer clock for a liquid crystal display driver is set up as CK1 and a clock delayed from the clock CK1 by a half period is set up as CK2. In each period of the clock CK1, the level of an input signal is judged by a level judging means at a half period from the CK1 to the CK2 or from the CK2 to the CK1. Since an input character signal is in an '1' level at a half period from a clock CK1 (11) to a clock CK2 (21) in the period of the clock CK1 in a section A, '1' is outputted as a synchronized character signal during the period of the section A of the clock CK1 corresponding to the half period. Since the '1' level is not continued in a half period from a clock CK1 (12) to a clock CK2 (22) in the succeeding section B, '0' is outputted in the section B of the clock CK1 corresponding to the half period.