Title:
LOAD DRIVING CIRCUIT
Document Type and Number:
Japanese Patent JP3736453
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a load driving circuit which can secure conformity in current waveforms of a MOS transistor when it is switched on/off and the same in a steady state.
SOLUTION: A power source +B, a load 1, and a force transistor Qf are connected in series, a sense transistor Qs and a detection resistor Rs are connected in parallel with the force transistor Qf. The force transistor Qf and the sense transistor Qs are turned on and off by a gate drive circuit 2. When a voltage generated across the detection resistor Rs excesses a predetermined value, a transistor 3 limits the current supplied to the load 1. when the transistor Qf, Qs are switched from off to on, or vice-versa, a substrate potential adjustment circuit 4 adjusts the substrate potential of the sense transistor Qs, so that waveform shaping for the current supplied to the sense transistor Qs is performed.
Inventors:
Yutaka Fukuda
Takashi Nakano
Nobumasa Ueda
Shoji Miura
Takashi Nakano
Nobumasa Ueda
Shoji Miura
Application Number:
JP2001390431A
Publication Date:
January 18, 2006
Filing Date:
December 21, 2001
Export Citation:
Assignee:
株式会社デンソー
International Classes:
H03K17/08; H03K17/687; H03K19/0175; (IPC1-7): H03K17/08; H03K17/687; H03K19/0175
Domestic Patent References:
| JP964707A | ||||
| JP4167813A | ||||
| JP2309714A | ||||
| JP1227520A | ||||
| JP677796A | ||||
| JP432543U | ||||
| JP1032475A | ||||
| JP2001168697A |
Foreign References:
| US4553084 |
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda
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