Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
LOGIC CIRCUIT DEVICE WITH OUTPUT ABNORMALITY DETECTING FUNCTION
Document Type and Number:
Japanese Patent JPS635272
Kind Code:
A
Abstract:

PURPOSE: To detect output abnormality in a hardware manner, by comparing the logic levels of the output data of the input point and output terminal of an output buffer.

CONSTITUTION: When output is normal, the logic level of the output data S1a read from an output port register 11 becomes same to that of the logic level of the signal S2a appearing in an output terminal 13a. Therefore, the output level of an exclusive OR gate 14a comes to 0 and the signal level appearing in the output terminal Q of FF16a also comes to 0 and, therefore, the content of an output abnormal register 17 is 0 at it is. When output is abnormal, since the level of the signal S2a is 0 when 1 is read as the output data S1a, the signals at both terminals of a buffer 12a comes to levels different from each other. As a result, the output level of the OR gate 14a comes to 1 and the signal level appearing at the terminal Q of FF16a also comes to 1. Then, 1 is set to the memory region concerned of a register 17 and an interruption processing signal INT is outputted through an OR gate 15 and output abnormality is detected by relatively simple constitution.


Inventors:
YAMADA NORIO
Application Number:
JP14702986A
Publication Date:
January 11, 1988
Filing Date:
June 25, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU TEN LTD
International Classes:
G01R31/28; G01R31/00; (IPC1-7): G01R31/00; G01R31/28
Attorney, Agent or Firm:
Aoki Akira