PURPOSE: To reduce the amount of wirings and to increase the area efficiency, by arranging plural gates on a line and forming them as a drive section and a load section.

CONSTITUTION: A multiinput logical gate circuit is formed by integrating the same construction of transistor (TR) groups in which the gate electrodes are connected to the drive section and the load section. TR groups Cell1, Cell2... functioning as the basic cells are arranged adjacently on a line. Further, gate electrodes A, B... are provided in parallel on a line. The wirings among the TR groups are finished by forming each gate with a common polycrystal silicon layer. That is, separate wiring is not required.