PURPOSE: To secure inverting operation by applying a trigger signal to a flip- flop through a gate applied with an inverting operation signal for the flip-flop.

CONSTITUTION: A trigger signal is generated by a D type FF101, an inverter 102, and an NAND gate 103 and applied to an FF107 composed of NAND gates 105 and 106 through an AND gate 104. An inverting-operating completion information 109b is led out from the output terminal of the NAND gate 106 and applied to the base of a transistor (TR)300 through a level shifting circuit 108. The collector and emitter of the TR300 are connected to the input terminal and output terminal of the AND gate 104, and an L-level trigger signal is held by the AND gate 104 and TR300 until the inverting operation of the FF107 is completed.