LOGICAL LEVEL CONVERSION CIRCUIT AND PHASE SYNCHRONIZATION CIRCUIT EMPLOYING IT

Japanese Patent JP2006303554

A

To provide a logical level conversion circuit generating an output signal for operating subsequent logical circuits correctly even if there is a threshold variation factor (process, temperature, power supply voltage), and to provide a phase synchronization circuit employing it.

In the logical level conversion circuit 5, an output signal 8 from a voltage controlled oscillator of a phase synchronization circuit is inputted to a variable threshold inverter 51. A DC component 10 of the output signal 19 from the variable threshold inverter 51 is taken out by a low-pass filter 52. The DC component 10 is inputted to a comparator 53 where it is compared with a comparison voltage. Based on the comparison result, a threshold set signal 11 is outputted to the variable threshold inverter 51. The threshold of the variable threshold inverter 51 is altered by the threshold set signal 11 and the output signal 8 is converted into the output signal 19. When the comparison result is brought into a predetermined state, a value of the threshold set signal 11 is held and the output signal 19 is delivered as an output signal 9.

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KAWAMOTO TAKASHI
KOKUBO MASARU
OSHIMA TAKASHI

JP2005117753A

November 02, 2006

April 15, 2005

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RENESAS TECH CORP

H03L7/08

JPS63217712A	1988-09-09
JP2000078003A	2000-03-14
JP2001243715A	2001-09-07
JPS5778611A	1982-05-17
JP2003347936A	2003-12-05
JP2001358565A	2001-12-26

Katsuo Ogawa
Kyosuke Tanaka

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