To safely and efficiently configure a circuit on a PLD (programmable logic device).
The reconfigurable logic device includes a fixed region, a logic region in which logics or wiring can be changed by rewriting the content of a configuration memory, an internal memory retaining a specific ID of the device, and a key register storing a secret key. Non-encrypted logic program data is obtained from an external storage device, and a configuration control circuit for controlling circuit configuration on the logic region is formed in the logic region. A key generation circuit, a decoding circuit, and a verification circuit are mounted with switching on the logic region. The key generation circuit performs operation by use of the device-specific ID stored in the internal memory to generate a secret key, and stores the generated secret key in the key register. The decoding circuit obtains encrypted logic program data from the external storage device and decodes it by use of the secret key. The verification circuit verifies the integrity of the logic program data.
COPYRIGHT: (C)2010,JPO&INPIT
Kenji Toda
Hiroshi Sakane
Sato certificate
| JP2003122442A | ||||
| JP2008123147A |
| WO2006115252A1 | ||||
| WO2006115212A1 |