PURPOSE: To simulate a logical circuit where logical data different in bit widths are combined by using circuits calculating the bit width of logical data and the arithmetic circuit of logical data.

CONSTITUTION: The logical data operation circuit 40 calculating logical data using a stack-type arithmetic circuit, the bit width operation circuit 30 calculating the bit width of logical data and a control circuit 20 controlling the fetching and the execution of an instruction are provided. Respective arithmetic circuits 30 and 40 are controlled by the control circuit 20 and the outputs of the control circuit 20 and the logical data arithmetic circuit 40 are controlled by the output of the bit width arithmetic circuit 30. Thus, logic different in the bit width, logic whose bit width is large and composed logic can be simulated in terms of hardware. Thus, the development burden of software can be reduced, a data communication amount reduces and simulation speed improves.