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Patent Searching and Data


Title:
LOGICAL SYMBOL DISCRIMINATOR
Document Type and Number:
Japanese Patent JPS5876987
Kind Code:
A
Abstract:

PURPOSE: To improve the accuracy, by obtaining an area of a logical symbol from an output side head to a prescribed length after detecting the head of a logical symbolic diagram, and recognizing and discriminating the types of the logical symbol from the area.

CONSTITUTION: A picture of a drawing describing a logical symbolic drawing is read and filed in a storage device tentatively. Further, a logical symbolic drawing is read from the storage device, and the drawing is scanned orthogonally to the direction of signal flow in the order of input side along the signal flow direction of the logical symbolic drawing, and cross points of the drawing lines and the interval between cross points are measured. When the cross points reach one point, it is regarded as the detection of the head of the logical symbolic drawing to measure an area S of an area returned by an interval l from the detected position. Further, the area S is compared with a prescribed value to discriminate whether the logical smbolic drawing is an AND circuit or an OR circuit. Thus, the reliability of discrimination can be improved.


Inventors:
MORI KAZUHIRO
TSUNEKAWA TAKASHI
Application Number:
JP17541281A
Publication Date:
May 10, 1983
Filing Date:
October 31, 1981
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06T7/00; G06F17/50; G06V10/42; (IPC1-7): G06K9/62
Domestic Patent References:
JPS4960652A1974-06-12
JPS5374843A1978-07-03
Attorney, Agent or Firm:
Takehiko Suzue