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Title:
LOW-IMPEDANCE-TYPE LAMINATED SOLID ELECTROLYTIC CAPACITOR
Document Type and Number:
Japanese Patent JPH06267801
Kind Code:
A
Abstract:

PURPOSE: To absorb the noises effectively in the high-frequency region higher than the specified frequency region at the low impedance and the low equivallent series resistance in the specified frequency region by bending and laminating capacitor parts and a plurality of metallic substrate parts located between the capacitor parts in the reverse direction with each other.

CONSTITUTION: A plurality of capacitor parts 2, wherein conductive macromolecular films are formed at the specified interval, are provided on the surface of one strip-shaped metal substrate 1, on the surface of which the dielectric oxide film is formed. A plurality of metal substrate parts 1-3, which are located between the capacitor parts 2 and 2, are bent in the zigzag shape in the reverse directions with each other. The capacitor parts 2 are bonded and laminated in the mutual contact pattern. Anode external electrode terminals 3 and 4 and a cathode external electrode terminal 5 are attached. Therefore, the bent metal substrate parts 1-3 act as coils. Thus, the noise absorption in the high frequency region of 1MHz or higher can be effectively performed at the low impedance and the low equivalent series resistance (100mΩ or lower) in the frequency range of 100kHz-1MHz.


Inventors:
TOIDA TAKESHI
SHIMURA MITSUGI
Application Number:
JP8136793A
Publication Date:
September 22, 1994
Filing Date:
March 16, 1993
Export Citation:
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Assignee:
NITSUKO LTD
International Classes:
H01G4/26; H01G4/35; H01G9/012; H01G9/02; H01G9/028; H01G9/04; H01G9/14; (IPC1-7): H01G9/05; H01G9/02; H01G9/14
Attorney, Agent or Firm:
Takashi Kumagai (1 outside)