PURPOSE: To suppress a power noise with a periodicity caused at the count by making the number of change bits of a counter output constant.

CONSTITUTION: An inverting output QB of flip-flops F0-F(n-2) and an output Q of a flip-flop F(n-1) are inputted to a NAND gate N(n-1), and an output of the NAND gate N(n-1) and an inverting output QB of an n-th bit flip-flop Fn are inputted to an XOR gate Xn. The output of the XOR gate Xn is connected to a data input D of the flip-flop Fn, a basic clock CLK is given to a timing input of each of the flip-flops F0-F4 to obtain counter outputs Q1-Q4 from the output Q of each of the flip-flops F0-F4.