PURPOSE: To manufacture a low-pass filter with a high resolution at a low cost.

CONSTITUTION: A signal Un inputted in a constant cycle is added to a previous input signal Un-1 by an adder b2, a signal Un+Un-1 is outputted to a shift register c8, and the desired number of digits of the signal is moved to the right, so that a signal 2-p.(Un+Un-1) can be obtained. And also, a signal 2-Q.Yn-1 obtained by moving the desired number of digits of a previous output signal Yn-1 to the right, is subtracted from a previous output signal Yn-1 by a computing element 11, so that a signal Yn-1-2-Q.Tn-1 can be obtained. Then, the signal 2-p.(Un+Un-1) outputted from the shift register c8 is added to the signal Yn-1-2-Q.Yn-1 outputted from the computing element 11 by an adder d4, so that a present output signal Yn=2-p (Un+Un-1)+Yn-1-2-Q.Yn-1 can be prepared.