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Title:
LOW POWER TYPE SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5756972
Kind Code:
A
Abstract:

PURPOSE: To accelerate the operation of a low power type semiconductor device by forming the semiconductor device of the first transistor having a P-N junction anode terminal and triode characteristics and the second transistor having pentode characteristics, commonly using the drain region, and increasing the mutual conductance.

CONSTITUTION: A p+ type anode region 17, an n type active layer 18, an n+ type drain region 19, an n type active layer 20 and an n+ type source region 21 are formed adjacently on an insulating substrate 1, and the first transistor is formed of the region 17 and the layer 18 with the region 19 as common drain region. Further, the second transistor is formed of the common region 19, the layer 20 and the region 21, and the thickness tc of the layer 18 of the first trnsistor is suppressed to less than 3 times the device length of th intrinsic semiconductor forming the layer 18. Thereafter, an anode electrode 22 and a source electrode 23 are formed on the regions 17 and 21, a gate electrode is formed through the gate insulating film 12 on the layers 18 and 20, and a drain electrode 27 is mounted on the region 19.


Inventors:
OOMURA YASUHISA
Application Number:
JP13113580A
Publication Date:
April 05, 1982
Filing Date:
September 20, 1980
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H01L27/08; H01L27/12; H01L29/68; H01L29/78; H01L29/786; (IPC1-7): H01L27/12; H01L29/06