Title:
LOW VOLTAGE CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPS61257016
Kind Code:
A
Abstract:
A low voltage control circuit, and associated method, is provided for maintaining at least one output terminal (64,72, 78) in a known state regardless of the state of the inputs (58, 66, 74), when at least one voltage (V,) to be monitored is above a threshold voltage and below a predetermined limit voltage, comprising control means (12) for providing a deactivating output voltage when the voltage to be monitored (V,) is below the predetermined limit voltage, output means (14) electrically coupled to the control means (12) for receiving the output voltage from the control means (12) and for receiving at least one input voltage, the output means (14) being deactivated in response to the deactivating output voltage to provide a known voltage state at the output terminal (64, 72, 78) until the voltage to be monitored (V1) reaches the predetermined limit voltage whereupon the control means (12) will provide an activating output voltage to the output means (14) to enable the voltage state at the output terminal (64, 72, 78) to be controlled by the state of the inputs (58, 66, 74).
Inventors:
UOOREN JII HAFUNAA
Application Number:
JP5456486A
Publication Date:
November 14, 1986
Filing Date:
March 12, 1986
Export Citation:
Assignee:
PITNEY BOWES INC
International Classes:
G05F3/24; G05F1/571; G06F1/28; H03K17/22; H03K17/687; (IPC1-7): G05F1/56; G05F3/24; H03K17/22; H03K17/687
Attorney, Agent or Firm:
Kyozo Yuasa